1. Technical Field
The present invention relates to a semiconductor device package, and more specifically, to a chip-exposed semiconductor device without extending leads and its production method.
2. Description of the Related Art
Surface mounted technology (SMT) is commonly used to mount electronic component on the printed circuit board (PCB). Power handling capacity, heat dissipation and device size are the important parameters in selecting semiconductor power device for SMT applications. It is desirable to produce a semiconductor power device capable of delivering high power with excellent heat dissipation, smaller footprint with low profile. Unfortunately certain parameters have to be sacrificed in order to meet the specification of others due to the nature they are competing with each other. In general small footprint usually means small chip size and small heat dissipation surface area, which tends to limit the power handling capability.
U.S. Pat. No. 7,154,168 discloses a flip chip semiconductor device and its making method, wherein the semiconductor device includes a molding compound having a window, a semiconductor chip and a leadframe. The molding compound covering at least a portion of the leadframe and at least a portion of the semiconductor die, with a plurality of leads extending out of the molding compound and laterally away from the molding compound, and a backside of the semiconductor chip exposed through the window forming an exterior surface of semiconductor die package. Meanwhile, U.S. Pat. No. 7,256,479 discloses a method of making a semiconductor package comprising a semiconductor die, a leadframe structure and a molding material formed around at least a portion of the die and at least a portion of the leadframe structure, wherein a first surface of the semiconductor die is substantially flush with at least part of an exterior surface of the molding material and a solderable layer in contact with the molding material on at least a portion of the exterior surface of the molding material with a plurality of leads arranged on both sides of the package of the semiconductor device. These technical approaches provide low profile semiconductor device with good thermal dissipation but fail to deliver a higher power beyond limitation of a traditional package.